PHASE=rising_edge, DATAWIDTH=mono, CLKPOL=normal, 3WIRE=dis, NUMBITS=0
Register for controlling SPI peripheral.
| PHASE | Clock Phase. 0 (rising_edge): Data Sampled on clock rising edge. Use when in SPI Mode 0 and Mode 2 1 (falling_edge): Data Sampled on clock falling edge. Use when in SPI Mode 1 and Mode 3 |
| CLKPOL | Clock Polarity. 0 (normal): Normal Clock. Use when in SPI Mode 0 and Mode 1 1 (inverted): Inverted Clock. Use when in SPI Mode 2 and Mode 3 |
| NUMBITS | Number of Bits per character. 0 (0): 16 bits per character. |
| DATAWIDTH | SPI Data width. 0 (mono): 1 data pin. 1 (dual): 2 data pins. 2 (quad): 4 data pins. |
| 3WIRE | Three Wire mode. MOSI/MISO pin (s) shared. Only Mono mode suports Four-Wire. 0 (dis): Use four wire mode (Mono only). 1 (en): Use three wire mode. |
| SSPOL | Slave Select Polarity, each Slave Select can have unique polarity. 1 (SS0_high): SS0 active high. 2 (SS1_high): SS1 active high. 4 (SS2_high): SS2 active high. |