Maxim-Integrated /max32650 /GCR /PCLK_DIS1

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Interpret as PCLK_DIS1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (en)UART2 0 (en)TRNG 0 (en)SFLC 0 (en)HBC 0 (en)GPIO3 0 (en)SCACHE 0 (en)SDMA 0 (en)SEMA 0 (en)SDHC 0 (en)ICACHE 0 (en)ICACHEXIPF 0 (en)OW 0 (en)SPI3 0 (en)I2S 0 (en)SPIXIPR

SEMA=en, SDMA=en, TRNG=en, SFLC=en, SPIXIPR=en, SPI3=en, HBC=en, ICACHE=en, SCACHE=en, OW=en, SDHC=en, GPIO3=en, I2S=en, ICACHEXIPF=en, UART2=en

Description

Peripheral Clock Disable.

Fields

UART2

UART2 Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

TRNG

TRNG Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

SFLC

Secore Flash Controller Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

HBC

HyperBus/Xccela Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

GPIO3

GPIO3 Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

SCACHE

System Cache Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

SDMA

Smart DMA Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

SEMA

Semaphore Block Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

SDHC

SDHC Controller Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

ICACHE

Flash Instruction Cache Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

ICACHEXIPF

SPI-XIPF Flash Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

OW

One-Wire Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

SPI3

SPI3 Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

I2S

I2S (SPIMSS) Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

SPIXIPR

SPIXR RAM Clock Disable.

0 (en): Clock enabled to the peripheral.

1 (dis): Clock disabled to the peripheral.

Links

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