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Maxim-Integrated /max32650 /GCR /RST1

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Interpret as RST1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (I2C1)I2C1 0 (PT)PT 0 (SPIXIP)SPIXIP 0 (XSPIM)XSPIM 0 (GPIO3)GPIO3 0 (SDHC)SDHC 0 (OWIRE)OWIRE 0 (WDT1)WDT1 0 (SPI3)SPI3 0 (I2S)I2S 0 (XIPR)XIPR 0 (SEMA)SEMA

Description

Reset 1.

Fields

I2C1

I2C1 Reset.
PT

Pulse Train Reset.
SPIXIP

SPI-XIPF Reset.
XSPIM

XSPI Master Reset.
GPIO3

GPIO3 Reset.
SDHC

SDHC Reset.
OWIRE

One-Wire Reset.
WDT1

WDT1 Reset.
SPI3

SPI3 Reset.
I2S

I2S (SPIMSS) Reset.
XIPR

SPIXR Reset.
SEMA

Semaphore Block Reset.

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk