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Maxim-Integrated /max32650 /I2C0 /MSTR_MODE

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Interpret as MSTR_MODE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (START)START 0 (RESTART)RESTART 0 (STOP)STOP 0 (7BIT_ADDR)SEA

SEA=7BIT_ADDR

Description

Master Control Register.

Fields

START

Setting this bit to 1 will start a master transfer.

1 (start): Start Master Mode transfer.
RESTART

Setting this bit to 1 will generate a repeated START.

1 (restart): Send a repeated start bit.
STOP

Setting this bit to 1 will generate a STOP condition.

1 (stop): Send a stop condition.
SEA

Slave Extend Address Select.

0 (7BIT_ADDR): 7-bit address.

1 (10BIT_ADDR): 10-bit address.

Links

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Register Reference

https://github.com/analogdevicesinc/msdk