TXFSH=not_flushed, TXPRELD=normal
Transmit Control Register 0.
| TXPRELD | Transmit FIFO Preaload Mode. Setting this bit will allow for high speed application to preload the transmit FIFO prior to Slave Address Match. 0 (normal): Normal TX FIFO Operation. 1 (preload): TX FIFO Preload mode. |
| TXFSH | Transmit FIFO Flush. This bit is automatically cleared to 0 after the operation. 0 (not_flushed): FIFO not flushed. 1 (flush): Flush TX_FIFO. |
| TXTH | Transmit FIFO Threshold. These bits define the TX_FIFO interrupt threshold. |