Maxim-Integrated /max32650 /I2C0 /TX_CTRL1

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Interpret as TX_CTRL1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (not_ready)TXRDY 0 (pause_on_last)TXLAST 0TXFIFO

TXRDY=not_ready, TXLAST=pause_on_last

Description

Transmit Control Register 1.

Fields

TXRDY

Transmit FIFO Preload Ready.

0 (not_ready): TX FIFO not ready to transmit preloaded data.

1 (ready): TX FIFO ready to transmit preloaded data.

TXLAST

Slave mode transmit last.

0 (pause_on_last): Hold SCL low after transmitting the last character in the TX FIFO until more characters are loaded.

1 (end_on_last): Release SCL after transmitting the last character in the TXT FIFO.

TXFIFO

Transmit FIFO Count. These bits reflect the number of bytes in the TX_FIFO.

Links

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