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Maxim-Integrated /max32650 /ICC0 /CACHE_CTRL

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Interpret as CACHE_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (dis)ENABLE 0 (notReady)READY

READY=notReady, ENABLE=dis

Description

Cache Control and Status Register.

Fields

ENABLE

Cache Enable. Controls whether the cache is bypassed or is in use. Changing the state of this bit will cause the instruction cache to be flushed and its contents invalidated.

0 (dis): Cache Bypassed. Instruction data is stored in the line fill buffer but is not written to main cache memory array.

1 (en): Cache Enabled.
READY

Cache Ready flag. Cleared by hardware when at any time the cache as a whole is invalidated (including a system reset). When this bit is 0, the cache is effectively in bypass mode (instruction fetches will come from main memory or from the line fill buffer). Set by hardware when the invalidate operation is complete and the cache is ready.

0 (notReady): Not Ready.

1 (ready): Ready.

Links

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Register Reference

https://github.com/analogdevicesinc/msdk