Maxim-Integrated /max32650 /NBBFC /REG0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as REG0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RDSGCSEL0 (internal)RDSGCSET 0HYPCGDLY0 (sys)USBRCKSEL 0 (med)QSPI0SEL 0 (dis)I2C0DGEN0 0 (dis)I2C0DGEN1 0 (dis)I2C1DGEN0 0 (dis)I2C1DGEN1

I2C1DGEN0=dis, I2C1DGEN1=dis, I2C0DGEN0=dis, I2C0DGEN1=dis, RDSGCSET=internal, USBRCKSEL=sys, QSPI0SEL=med

Description

Register 0.

Fields

RDSGCSEL

Hyperbus RDS Gray Code Select.

RDSGCSET

Hyperbus RDS Set.

0 (internal): Select internal setting.

1 (gray_code): Select gray code.

HYPCGDLY

Hyperbus Clock Generator Delay.

USBRCKSEL

USB Reference Clock Select.

0 (sys): Generated clock from system clock.

1 (dig): Digital clock from a GPIO.

QSPI0SEL

QSPI0 Function Select.

0 (med): Select SPI Medical functions.

1 (qspi0): Select QSPI0 function.

I2C0DGEN0

I2C0 SDA Glitch Filter Enable.

0 (dis): Filter disabled.

1 (en): Filter enabled.

I2C0DGEN1

I2C0 SCL Glitch Filter Enable.

0 (dis): Filter disabled.

1 (en): Filter enabled.

I2C1DGEN0

I2C1 SDA Glitch Filter Enable.

0 (dis): Filter disabled.

1 (en): Filter enabled.

I2C1DGEN1

I2C1 SCL Glitch Filter Enable.

0 (dis): Filter disabled.

1 (en): Filter enabled.

Links

()