Maxim-Integrated /max32650 /PWRSEQ /CTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (dis)RAMRET 0 (dis)RREGEN 0 (dis)BKGRND 0 (dis)FWKM 0 (on)BGOFF 0 (en)PORVCOREMD 0 (en)VCOREMD 0 (en)VRTCMD 0 (en)VDDAMD 0 (en)VDDIOMD 0 (en)VDDIOHMD 0 (en)PORVDDIOMD 0 (en)PORVDDIOHMD 0 (en)VDDBMD

PORVDDIOHMD=en, VDDBMD=en, PORVCOREMD=en, BGOFF=on, VRTCMD=en, VDDIOMD=en, PORVDDIOMD=en, VDDAMD=en, VCOREMD=en, VDDIOHMD=en, BKGRND=dis, RREGEN=dis, RAMRET=dis, FWKM=dis

Description

Low Power Control Register.

Fields

RAMRET

System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit.

0 (dis): Disable Ram Retention.

1 (en1): Enable System RAM 0 retention.

2 (en2): Enable System RAM 0 and 1 retention.

3 (en3): Enable System RAM 0 and 1 retention, if RREGEN=0, Enable all System RAM retention.

RREGEN

Backup Mode RAM Retention Regulator Enable

0 (dis): Disabled.

1 (en): Enabled.

BKGRND

Background Mode Enable. This bit allows low-power background mode operations, while the CPU is in DeepSleep.

0 (dis): Disabled.

1 (en): Enabled.

FWKM

Fast Wake-Up Mode. This bit enables fast wake-up from DeepSleep mode. (5uS typical).

0 (dis): Disabled.

1 (en): Enabled.

BGOFF

Bandgap OFF. This controls the System Bandgap in DeepSleep mode.

0 (on): Bandgap is always ON.

1 (off): Bandgap is OFF in DeepSleep mode(default).

PORVCOREMD

VCORE POR Monitor for DEEPSLEEP and BACKUP Disable Write 1 to disable the power failure monitor. With the power failure monitor enabled, if the voltage drops below the trigger voltage the device enters a Power-On Reset.

0 (en): Enable if Bandgap is ON(default)

1 (dis): Disabled.

VCOREMD

VDDC(Vcore) Monitor Disable. This bit controls the power monitor on the VCore supply in all operating modes.

0 (en): Enable if Bandgap is ON(default)

1 (dis): Disabled.

VRTCMD

VRTC Monitor Disable. This bit controls the power monitor on the Always-On Supply in all operating modes.

0 (en): Enable if Bandgap is ON(default)

1 (dis): Disabled.

VDDAMD

VDDA Monitor Disable. This bit controls the power monitor of the Analog Supply in all operating modes.

0 (en): Enable if Bandgap is ON(default)

1 (dis): Disabled.

VDDIOMD

VDDIO Monitor Disable. This bit controls the power monitor of the Analog Supply in all operating modes.

0 (en): Enable if Bandgap is ON(default)

1 (dis): Disabled.

VDDIOHMD

VFDDIOH Monitor Disable. This bit controls the power monitor of the Analog Supply in all operating modes.

0 (en): Enable if Bandgap is ON(default)

1 (dis): Disabled.

PORVDDIOMD

VFDDIOH Monitor Disable. This bit controls the power monitor of the Analog Supply in all operating modes.

0 (en): Enable if Bandgap is ON(default)

1 (dis): Disabled.

PORVDDIOHMD

VFDDIOH Monitor Disable. This bit controls the power monitor of the Analog Supply in all operating modes.

0 (en): Enable if Bandgap is ON(default)

1 (dis): Disabled.

VDDBMD

VDDB Power-On Reset Monitor Disable. This bit controls the Power-On Reset monitor on VDDB supply in all operating mods.

0 (en): Enabled.

1 (dis): Disabled.

Links

()