Maxim-Integrated /max32650 /SDHC /INT_STAT

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as INT_STAT

15 1211 87 43 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CMD_COMP)CMD_COMP 0 (TRANS_COMP)TRANS_COMP 0 (BLK_GAP_EVENT)BLK_GAP_EVENT 0 (DMA)DMA 0 (BUFF_WR_READY)BUFF_WR_READY 0 (BUFF_RD_READY)BUFF_RD_READY 0 (CARD_INSERTION)CARD_INSERTION 0 (CARD_REMOVAL)CARD_REMOVAL 0 (CARD_INTR)CARD_INTR 0 (RETUNING)RETUNING 0 (ERR_INTR)ERR_INTR

Description

Normal Interrupt Status.

Fields

CMD_COMP

Command Complete.

TRANS_COMP

Transfer Complete.

BLK_GAP_EVENT

Block Gap Event.

DMA

DMA Interrupt.

BUFF_WR_READY

Buffer Write Ready.

BUFF_RD_READY

Buffer Read Ready.

CARD_INSERTION

Card Insertion.

CARD_REMOVAL

Card Removal.

CARD_INTR

Card Interrupt.

RETUNING

Re-Tuning Event.

ERR_INTR

Error Interrupt.

Links

()