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Maxim-Integrated /max32650 /SPIXR /BRG_CTRL

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Interpret as BRG_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LO0HI0 (div1)SCALE

SCALE=div1

Description

Register for controlling SPI clock rate.

Fields

LO

Low duty cycle control. In timer mode, reload[7:0].
HI

High duty cycle control. In timer mode, reload[15:8].
SCALE

System Clock scale factor. Scales the AMBA clock by 2^SCALE before generating serial clock.

0 (div1): clk_freq = f_pclk/1.

1 (div2): clk_freq = f_pclk/2.

2 (div4): clk_freq = f_pclk/4.

3 (div8): clk_freq = f_pclk/8.

4 (div16): clk_freq = f_pclk/16.

5 (div32): clk_freq = f_pclk/32.

6 (div64): clk_freq = f_pclk/64.

7 (div128): clk_freq = f_pclk/128.

8 (div256): clk_freq = f_pclk/256.

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk