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Maxim-Integrated /max32650 /TPU /CRC_CTRL

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Interpret as CRC_CTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (dis)CRC_EN 0 (lsbFirst)MSB 0 (dis)PRNG 0 (dis)ENT 0 (dis)HAM 0 (HRST)HRST

ENT=dis, MSB=lsbFirst, PRNG=dis, CRC_EN=dis, HAM=dis

Description

CRC Control Register.

Fields

CRC_EN

Cyclic Redundancy Check Enable. The CRC cannot be enabled if the PRNG is enabled.

0 (dis): Disable.

1 (en): Enable.
MSB

MSB select. This bit selects the order of calculating CRC on data.

0 (lsbFirst): LSB First.

1 (msbFirst): MSB First.
PRNG

Pseudo Random Number Generator Enable. If entropy is disabled, this outputs one byte of pseudo random data per clock cycle. If entropy is enabled, data is output at a rate of one bit per clock cycle.

0 (dis): Disable.

1 (en): Enable.
ENT

Entropy Enable. If the PRNG is enabled, this mixes the high frequency ring oscillator with the LFSR. If the PRNG is disabled, the raw entropy data is output at a rate of 1 bit per clock. This makes it possible to characterize the quality of the entropy source.

0 (dis): Disable.

1 (en): Enable.
HAM

Hamming Code Enable. Enable hamming code calculation.

0 (dis): Disable.

1 (en): Enable.
HRST

Hamming Reset. Reset Hamming code ECC generator for next block.

1 (reset): Starts reset operation.

Links

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Register Reference

https://github.com/analogdevicesinc/msdk