Maxim-Integrated /max32650 /UART0 /STAT

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as STAT

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (idle)TX_BUSY 0 (idle)RX_BUSY 0 (0)PARITY 0 (BREAK)BREAK 0 (RX_EMPTY)RX_EMPTY 0 (RX_FULL)RX_FULL 0 (TX_EMPTY)TX_EMPTY 0 (TX_FULL)TX_FULL 0RX_NUM0TX_NUM0 (RX_TO)RX_TO

TX_BUSY=idle, RX_BUSY=idle, PARITY=0

Description

Status Register.

Fields

TX_BUSY

Read-only flag indicating the UART transmit status.

0 (idle): The UART block is not currently transmitting chracters.

1 (busy): UART block currently transmitting chracters.

RX_BUSY

Read-only flag indicating the UARTreceiver status.

0 (idle): The UART block is not currently receiving chracters.

1 (busy): UART block currently receiving chracters.

PARITY

9th Received bit state. This bit identifies the state of the 9th bit of received data. Only available for UART_CTRL.SIZE[1:0]=3.

0 (0): Received a parity bit of 0.

1 (1): Received a parity bit of 1.

BREAK

Received BREAK status. BREAKS is cleared when UART_STAT register is read. Received data input is held in spacing (logic 0) state for longer than a full word transmission time (that is, the total time of Start bit + data bits + Parity + Stop bits).

1 (recv): Break frame received.

RX_EMPTY

Read-only flag indicating the RX FIFO state.

1 (empty): RX FIFO empty.

RX_FULL

Read-only flag indicating the RX FIFO state.

1 (full): RX FIFO full.

TX_EMPTY

Read-only flag indicating the TX FIFO state.

1 (empty): TX FIFO empty.

TX_FULL

Read-only flag indicating the TX FIFO state.

1 (full): TX FIFO empty.

RX_NUM

Indicates the number of bytes currently in the RX FIFO.

TX_NUM

Indicates the number of bytes currently in the TX FIFO.

RX_TO

Receiver Timeout Status. Indicates if timeout has occurred.

1 (expired): RX timeout has occurred.

Links

()