Regviz

Maxim-Integrated /max32657 /FCR /CMPCLK

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Interpret as CMPCLK

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESULT

Description

Compared Clock Result Register.

Fields

RESULT

Compared Clock Result.

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk