Maxim-Integrated /max32657 /GCR /SYSCTRL

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Interpret as SYSCTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (normal)ICC_FLUSH 0 (complete)CCHK 0 (pass)CHKRES 0OVR

ICC_FLUSH=normal, CCHK=complete, CHKRES=pass

Description

System Control.

Fields

ICC_FLUSH

Code Cache Flush. This bit is used to flush the code caches and the instruction buffer of the Cortex-M4.

0 (normal): Normal Code Cache Operation

1 (flush): Code Caches and CPU instruction buffer are flushed

CCHK

Compute ROM Checksum. This bit is self-cleared when calculation is completed. Once set, software clearing this bit is ignored and the bit will remain set until the operation is completed.

0 (complete): No operation/complete.

1 (start): Start operation.

CHKRES

ROM Checksum Result. This bit is only valid when the checksum is done and CCHK0 bit is cleared…

0 (pass): ROM Checksum Correct.

1 (fail): ROM Checksum Fail.

OVR

Operating Voltage Range.

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