Regviz

Maxim-Integrated /max32657 /I3C0 /TARG_DMACTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TARG_DMACTRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Maxim-Integrated/max32657/I3C0/TARG_DMACTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DIS)RX_EN 0 (DIS)TX_EN 0 (BYTE)WIDTH

RX_EN=DIS, WIDTH=BYTE, TX_EN=DIS

Description

Target DMA Control Register.

Fields

RX_EN

DMA read enable.

0 (DIS): Disable DMA.

1 (ONE_FR): Enable DMA for one frame.

2 (EN): Enable DMA until disabled by setting this field to 0b00.
TX_EN

DMA write enable.

0 (DIS): Disable DMA.

1 (ONE_FR): Enable DMA for one frame.

2 (EN): Enable DMA until disabled by setting this field to 0b00.
WIDTH

Selects the data width for DMA transfers.

0 (BYTE): Byte size.

2 (HALFWORD): Halfword size.

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk