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Maxim-Integrated /max32657 /PWRSEQ /LPCTRL

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Interpret as LPCTRL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SRAMRET_EN0 (on)BG_DIS 0 (dis)RETLDO_EN 0 (dis)LDO_EN_DLY 0 (LPWKFL_CLR)LPWKFL_CLR

RETLDO_EN=dis, LDO_EN_DLY=dis, BG_DIS=on

Description

Low Power Control Register.

Fields

SRAMRET_EN

System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit.
BG_DIS

Bandgap OFF. This controls the System Bandgap in DeepSleep mode.

0 (on): Bandgap is always ON.

1 (off): Bandgap is OFF in DeepSleep mode (default).
RETLDO_EN

Retention LDO Enable.

0 (dis): Disable.

1 (en): Enable.
LDO_EN_DLY

Core LDO Enable Delay.

0 (dis): Disable.

1 (en): Enable delay LDO power up to smooth LDO voltage drop.
LPWKFL_CLR

LP wakeup flag register clear.

Links

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Register Reference

https://github.com/analogdevicesinc/msdk