Maxim-Integrated /max32657 /SPC /MPC_INTEN

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Interpret as MPC_INTEN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SRAM0)SRAM0 0 (SRAM1)SRAM1 0 (SRAM2)SRAM2 0 (SRAM3)SRAM3 0 (SRAM4)SRAM4 0 (FLASH)FLASH

Description

Secure MPC Interrupt Enable Register.

Fields

SRAM0

Interrupt enable for SRAM 0 Memory Protection Controller.

SRAM1

Interrupt enable for SRAM1 Memory Protection Controllers.

SRAM2

Interrupt enable for SRAM2 Memory Protection Controllers.

SRAM3

Interrupt enable for SRAM3 Memory Protection Controllers.

SRAM4

Interrupt enable for SRAM4 Memory Protection Controllers.

FLASH

Interrupt enable for Flash Memory Protection Controllers.

Links

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