SCLK_FB_INV=Normal, DATA_WIDTH=Mono, THREE_WIRE=dis, CLKPOL=Normal, NUMBITS=16, CLKPHA=Rising_Edge
Register for controlling SPI peripheral.
| CLKPHA | Clock Phase. 0 (Rising_Edge): Data Sampled on clock rising edge. Use when in SPI Mode 0 and Mode 2 1 (Falling_Edge): Data Sampled on clock falling edge. Use when in SPI Mode 1 and Mode 3 |
| CLKPOL | Clock Polarity. 0 (Normal): Normal Clock. Use when in SPI Mode 0 and Mode 1 1 (Inverted): Inverted Clock. Use when in SPI Mode 2 and Mode 3 |
| SCLK_FB_INV | Clock Polarity. 0 (Normal): Normal Clock. Use when in SPI Mode 0 and Mode 1 1 (Inverted): Inverted Clock. Use when in SPI Mode 2 and Mode 3 |
| NUMBITS | Number of Bits per character. 0 (16): 16 bits per character. 1 (1): 1 bits per character. 2 (2): 2 bits per character. 3 (3): 3 bits per character. 4 (4): 4 bits per character. 5 (5): 5 bits per character. 6 (6): 6 bits per character. 7 (7): 7 bits per character. 8 (8): 8 bits per character. 9 (9): 9 bits per character. 10 (10): 10 bits per character. 11 (11): 11 bits per character. 12 (12): 12 bits per character. 13 (13): 13 bits per character. 14 (14): 14 bits per character. 15 (15): 15 bits per character. |
| DATA_WIDTH | SPI Data width. 0 (Mono): 1 data pin. 1 (Dual): 2 data pins. 2 (Quad): 4 data pins. |
| THREE_WIRE | Three Wire mode. MOSI/MISO pin(s) shared. Only Mono mode suports Four-Wire. 0 (dis): Use four wire mode (Mono only). 1 (en): Use three wire mode. |
| TSPOL | Target Select Polarity, each Target Select can have unique polarity. 1 (TS0_high): TS0 active high. 2 (TS1_high): TS1 active high. 4 (TS2_high): TS2 active high. |