Maxim-Integrated /max32660 /DMA /INT_EN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as INT_EN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (dis)CHIEN

CHIEN=dis

Description

DMA Control Register.

Fields

CHIEN

Channel Interrupt Enable.

0 (dis): Disable.

1 (en): Enable.

Links

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