X32K_EN=dis, CLKRDY=busy, PSC=div1, CLKSEL=HIRC, X32K_RDY=not
Clock Control.
| PSC | Prescaler Select. This 3 bit field sets the system operating frequency by controlling the prescaler that divides the output of the PLL0. 0 (div1): Divide by 1. 1 (div2): Divide by 2. 2 (div4): Divide by 4. 3 (div8): Divide by 8. 4 (div16): Divide by 16. 5 (div32): Divide by 32. 6 (div64): Divide by 64. 7 (div128): Divide by 128. |
| CLKSEL | Clock Source Select. This 3 bit field selects the source for the system clock. 0 (HIRC): The internal 96 MHz oscillator is used for the system clock. 3 (nanoRing): The nano-ring output is used for the system clock. 6 (hfxIn): HFXIN is used for the system clock. |
| CLKRDY | Clock Ready. This read only bit reflects whether the currently selected system clock source is running. 0 (busy): Switchover to the new clock source (as selected by CLKSEL) has not yet occurred. 1 (ready): System clock running from CLKSEL clock source. |
| X32K_EN | 32kHz Crystal Oscillator Enable. 0 (dis): Is Disabled. 1 (en): Is Enabled. |
| HIRC_EN | 60MHz High Frequency Internal Reference Clock Enable. |
| X32K_RDY | 32kHz Crystal Oscillator Ready 0 (not): Is not Ready. 1 (ready): Is Ready. |
| HIRC_RDY | 60MHz HIRC Ready. |
| LIRC8K_RDY | 8kHz Low Frequency Reference Clock Ready. |