ICC0_FLUSH=normal, FPU_DIS=enable, FLASH_PAGE_FLIP=normal, SWD_DIS=enable
System Control.
FLASH_PAGE_FLIP | Flips the Flash bottom and top halves. (Depending on the total flash size, each half is either 256K or 512K). Initiating a flash page flip will cause a flush of both the data buffer on the DCODE bus and the internal instruction buffer. 0 (normal): Physical layout matches logical layout. 1 (swapped): Bottom half mapped to logical top half and vice versa. |
FPU_DIS | Floating Point Unit Disable 0 (enable): enable Floating point unit 1 (disable): disable floating point unit |
ICC0_FLUSH | Instruction Cache Controller Flush. Write 1 to flush the internal flash cache. This bit is cleared by hardware when the flush is complete. 0 (normal): Normal Code Cache Operation 1 (flush): Code Caches and CPU instruction buffer are flushed |
SWD_DIS | Serial Wire Debug Disable 0 (enable): Enable JTAG SWD 1 (disable): Disable JTAG SWD |