Maxim-Integrated /max32660 /I2C0 /MSTR_MODE

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Interpret as MSTR_MODE

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (START)START 0 (RESTART)RESTART 0 (STOP)STOP 0 (7_bits_address)SEA

SEA=7_bits_address

Description

Master Control Register.

Fields

START

Setting this bit to 1 will start a master transfer.

RESTART

Setting this bit to 1 will generate a repeated START.

STOP

Setting this bit to 1 will generate a STOP condition.

SEA

Slave Extend Address Select.

0 (7_bits_address): 7-bit address.

1 (10_bits_address): 10-bit address.

Links

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