VDDIO_POR_DIS=en, FAST_WK_EN=dis, RAMRET_SEL0=dis, VCORE_SVM_DIS=en, LDO_DIS=en, RAMRET_SEL3=dis, RAMRET_SEL2=dis, BG_OFF=on, OVR=0_9V, RETREG_EN=dis, VCORE_POR_DIS=dis, VCORE_DET_BYPASS=enabled, RAMRET_SEL1=dis
Low Power Control Register.
| RAMRET_SEL0 | System RAM 0 Data retention in BACKUP mode. 0 (dis): Disabled. 1 (en): Enabled. |
| RAMRET_SEL1 | System RAM 1 Data retention in BACKUP mode. 0 (dis): Disabled. 1 (en): Enabled. |
| RAMRET_SEL2 | System RAM 2 Data retention in BACKUP mode. 0 (dis): Disabled. 1 (en): Enabled. |
| RAMRET_SEL3 | System RAM 3 Data retention in BACKUP mode. 0 (dis): Disabled. 1 (en): Enabled. |
| OVR | Operating Voltage Range 0 (0_9V): 0.9V 24MHz 1 (1_0V): 1.0V 48MHz 2 (1_1V): 1.1V 96MHz |
| VCORE_DET_BYPASS | Bypass V CORE External Supply Detection 0 (enabled): enable 1 (Disable): disable |
| RETREG_EN | Retention Regulator Enable. This bit controls the retention regulator in BACKUP mode. 0 (dis): Disabled. 1 (en): Enabled. |
| FAST_WK_EN | Fast Wake-Up Mode. This bit enables fast wake-up from DeepSleep mode. 0 (dis): Disabled. 1 (en): Enabled. |
| BG_OFF | Band Gap Disable for DEEPSLEEP and BACKUP Mode 0 (on): Bandgap is always ON. 1 (off): Bandgap is OFF in DeepSleep mode(default). |
| VCORE_POR_DIS | V CORE POR Disable for DEEPSLEEP and BACKUP Mode 0 (dis): Disabled. 1 (en): Enabled. |
| LDO_DIS | LDO Disable 0 (en): Enable if Bandgap is ON(default) 1 (dis): Disabled. |
| VCORE_SVM_DIS | V CORE Supply Voltage Monitor Disable 0 (en): Enable if Bandgap is ON(default) 1 (dis): Disabled. |
| VDDIO_POR_DIS | VDDIO Power-On Reset Monitor Disable. This bit controls the Power-On Reset monitor on VDDIO supply in all operating mods. 0 (en): Enabled. 1 (dis): Disabled. |