Maxim-Integrated /max32660 /UART0 /INT_EN

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as INT_EN

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RX_FRAME_ERROR)RX_FRAME_ERROR 0 (RX_PARITY_ERROR)RX_PARITY_ERROR 0 (CTS)CTS 0 (RX_OVERRUN)RX_OVERRUN 0 (RX_FIFO_LVL)RX_FIFO_LVL 0 (TX_FIFO_AE)TX_FIFO_AE 0 (TX_FIFO_LVL)TX_FIFO_LVL 0 (BREAK)BREAK 0 (RX_TO)RX_TO 0 (LAST_BREAK)LAST_BREAK

Description

Interrupt Enable Register.

Fields

RX_FRAME_ERROR

Enable for RX Frame Error Interrupt.

RX_PARITY_ERROR

Enable for RX Parity Error interrupt.

CTS

Enable for CTS signal change interrupt.

RX_OVERRUN

Enable for RX FIFO OVerrun interrupt.

RX_FIFO_LVL

Enable for interrupt when RX FIFO reaches the number of bytes configured by the RXTHD field.

TX_FIFO_AE

Enable for interrupt when TX FIFO has only one byte remaining.

TX_FIFO_LVL

Enable for interrupt when TX FIFO reaches the number of bytes configured by the TXTHD field.

BREAK

Enable for received BREAK character interrupt.

RX_TO

Enable for RX Timeout Interrupt. Trigger if there is no RX communication during n UART characters (n=UART_CN.RXTO).

LAST_BREAK

Enable for Last break character interrupt.

Links

()