Maxim-Integrated /max32662 /CAN0 /EINTEN

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Interpret as EINTEN

7 43 0 0 00 0 0 0 0 0 0 0 0 (RX_THD)RX_THD 0 (RX_TO)RX_TO

Description

Extended Interrupt Enable Register.

Fields

RX_THD

RX FIFO reach programmed trigger level, it is set when the RX FIFO reaches programmed trigger level (RT[2:0] in MR register). To clear the RXFT interrupt, write this bit 1

RX_TO

RX FIFO Timeout Indicator. It is set when there is no write or read from/in to RX FIFO for the user defined time (RXFTO register) and there is at least 1 entry in RX FIFO during this time, this bit is clear by write 1

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