Maxim-Integrated /max32662 /GCR /PCLKDIS0

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Interpret as PCLKDIS0

31282724232019161512118743000000000000000000000000000000000000000000 (en)GPIO00 (DMA)DMA0 (SPI0)SPI00 (SPI1)SPI10 (UART0)UART00 (UART1)UART10 (I2C0)I2C00 (TMR0)TMR00 (TMR1)TMR10 (TMR2)TMR20 (ADC)ADC0 (I2C1)I2C10 (PT)PT

GPIO0=en

Description

Peripheral Clock Disable.

Fields

GPIO0

GPIO0 Clock Disable.

0 (en): enable it.

1 (dis): disable it.

DMA

DMA Clock Disable.

SPI0

SPI 0 Clock Disable.

SPI1

SPI 1 Clock Disable.

UART0

UART 0 Clock Disable.

UART1

UART 1 Clock Disable.

I2C0

I2C 0 Clock Disable.

TMR0

Timer 0 Clock Disable.

TMR1

Timer 1 Clock Disable.

TMR2

Timer 2 Clock Disable.

ADC

ADC Clock Disable.

I2C1

I2C 1 Clock Disable.

PT

Pluse Train Clock Disable.

Links

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