Maxim-Integrated /max32662 /GCR /SYSCTRL

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Interpret as SYSCTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SBUSARB 0 (FPUS_DIS)FPUS_DIS 0 (normal)ICC0_FLUSH 0 (complete)CCHK 0 (SWD_DIS)SWD_DIS 0 (pass)CHKRES

CHKRES=pass, CCHK=complete, ICC0_FLUSH=normal

Description

System Control.

Fields

SBUSARB

System bus arbitration scheme. These bits are used to select between Fixed burst arbitration and Round Robin scheme. The Round Robin scheme is selected by default.

FPUS_DIS

Cortex M4 Floating Point Disable This bit is used to disable the floating-point unit of the Cortex-M4.

ICC0_FLUSH

Code Cache Flush. This bit is used to flush the code caches and the instruction buffer of the Cortex-M4.

0 (normal): Normal Code Cache Operation

1 (flush): Code Caches and CPU instruction buffer are flushed

CCHK

Compute ROM Checksum. This bit is self-cleared when calculation is completed. Once set, software clearing this bit is ignored and the bit will remain set until the operation is completed.

0 (complete): No operation/complete.

1 (start): Start operation.

SWD_DIS

Serial Wire Debug Disable.

CHKRES

ROM Checksum Result. This bit is valid when the checksum is done and the CCHK bit is cleared.

0 (pass): ROM Checksum Correct.

1 (fail): ROM Checksum Fail.

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