Maxim-Integrated /max32662 /MCR /ADCCFG0

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ADCCFG0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LP_EXTCLK_EN)LP_EXTCLK_EN 0 (EXT_REF)EXT_REF 0 (INT_REF)INT_REF

Description

ADC Config Register 0.

Fields

LP_EXTCLK_EN

Enable input driver for LP External Clock.

EXT_REF

External Reference Select.

INT_REF

Internal Reference Select Option, when not using External Reference.

Links

()