Maxim-Integrated /max32662 /MCR /ADCCFG1

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Interpret as ADCCFG1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0THRU_PAD_SW_EN 0AIN_INP_EN 0 (THRU_EN)THRU_EN 0 (AMP_EN)AMP_EN 0 (AMP_RRI_EN)AMP_RRI_EN 0DIVSEL

Description

ADC Config Register 1.

Fields

THRU_PAD_SW_EN

Enable the MUX switch, switch placed in padring, used in the buffer path. Each pad has a separate THRU_PAD_SW_EN signal.

AIN_INP_EN

AIN Input Enable.

THRU_EN

Enable the MUX switches, switch placed in analog_sys, used in the buffer path.

AMP_EN

Enable the buffer amplifier used in the buffer path.

AMP_RRI_EN

Enable the buffer amplifier to operatore for Rail to Rail Input, Active High. If it is low, only NMOS Input pair will be operating which would restrict the range,

DIVSEL

Select one of the three different signal paths.

Links

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