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Maxim-Integrated /max32662 /MCR /LPPIOCTRL

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Interpret as LPPIOCTRL

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31282724232019161512118743000000000000000000000000000000000000000000 (TMR3_IN)TMR3_IN0 (TMR3_OUT)TMR3_OUT0 (TMR3_OUT_N)TMR3_OUT_N

Description

Low Power Peripheral IO Control Register.

Fields

TMR3_IN

Enable control for TMR3 (LPTMR0) input. If enabled, the associated GPIO input is connected to the peripheral; otherwise the input to the peripheral is forced low.
TMR3_OUT

Enable control for LPTMR0 output. If enabled and peripheral clock also enabled (PCLKDIS.LPTMR0), the peripheral output controls the associated GPIO in output mode; otherwise GPIO control comes from GPIO control module.
TMR3_OUT_N

Enable control for TMR3 (LPTMR0) complementary output. If enabled and peripheral clock also enabled (PCLKDIS.TMR3), the peripheral output controls the associated GPIO in output mode; otherwise GPIO control comes from GPIO control module

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk