Maxim-Integrated /max32662 /MCR /RST

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RST

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TMR3)TMR3 0 (RTC)RTC

Description

Reset Register.

Fields

TMR3

TMR3 (LPTMR0) Reset. Setting this bit to 1 resets TMR3 (LPTMR0) block.

RTC

Real Time Clock Reset.

Links

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