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Maxim-Integrated /max32665 /DMA /CN

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Interpret as CN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (dis)CH0_IEN 0 (CH1_IEN)CH1_IEN 0 (CH2_IEN)CH2_IEN 0 (CH3_IEN)CH3_IEN 0 (CH4_IEN)CH4_IEN 0 (CH5_IEN)CH5_IEN 0 (CH6_IEN)CH6_IEN 0 (CH7_IEN)CH7_IEN

CH0_IEN=dis

Description

DMA Control Register.

Fields

CH0_IEN

Channel 0 Interrupt Enable.

0 (dis): Disable.

1 (en): Enable.
CH1_IEN

Channel 1 Interrupt Enable.
CH2_IEN

Channel 2 Interrupt Enable.
CH3_IEN

Channel 3 Interrupt Enable.
CH4_IEN

Channel 4 Interrupt Enable.
CH5_IEN

Channel 5 Interrupt Enable.
CH6_IEN

Channel 6 Interrupt Enable.
CH7_IEN

Channel 7 Interrupt Enable.

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk