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Maxim-Integrated /max32665 /GCR /APB_ASYNC

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Interpret as APB_ASYNC

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (pclk)APBASYNCI2C0 0 (APBASYNCI2C1)APBASYNCI2C1 0 (APBASYNCI2C2)APBASYNCI2C2 0 (APBASYNCPT)APBASYNCPT

APBASYNCI2C0=pclk

Description

APB Asynchronous Bridge Select Register

Fields

APBASYNCI2C0

Feeds I2C0 with either PCLK or 7.37MHz Clk

0 (pclk): PCLK Source

1 (7mclk): 7.37MHz Source
APBASYNCI2C1

Feeds I2C1 with either PCLK or 7.37MHz Clk
APBASYNCI2C2

Feeds I2C2 with either PCLK or 7.37MHz Clk
APBASYNCPT

Feeds PT with either PCLK or 7.37MHz Clk

Links

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Register Reference

https://github.com/analogdevicesinc/msdk