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Maxim-Integrated /max32665 /GCR /ECC_IRQEN

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Interpret as ECC_IRQEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SYSRAM0ECCEN)SYSRAM0ECCEN 0 (SYSRAM1ECCEN)SYSRAM1ECCEN 0 (SYSRAM2ECCEN)SYSRAM2ECCEN 0 (SYSRAM3ECCEN)SYSRAM3ECCEN 0 (SYSRAM4ECCEN)SYSRAM4ECCEN 0 (SYSRAM5ECCEN)SYSRAM5ECCEN 0 (IC0ECCEN)IC0ECCEN 0 (IC1ECCEN)IC1ECCEN 0 (ICXIPECCEN)ICXIPECCEN 0 (FL0ECCEN)FL0ECCEN 0 (FL1ECCEN)FL1ECCEN

Description

ECC IRQ Enable Register

Fields

SYSRAM0ECCEN

System RAM0 ECC Error Interrupt Enable
SYSRAM1ECCEN

System RAM1 ECC Error Interrupt Enable
SYSRAM2ECCEN

System RAM2 ECC Error Interrupt Enable
SYSRAM3ECCEN

System RAM3 ECC Error Interrupt Enable
SYSRAM4ECCEN

System RAM4 ECC Error Interrupt Enable
SYSRAM5ECCEN

System RAM5 ECC Error Interrupt Enable
IC0ECCEN

Icache0 ECC Error Interrupt Enable
IC1ECCEN

Icache1 ECC Error Interrupt Enable
ICXIPECCEN

IcacheXIP ECC Error Interrupt Enable
FL0ECCEN

Flash0 NError ECC Interrupt Enable
FL1ECCEN

Flash1 ECC Error Interrupt Enable

Links

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Register Reference

https://github.com/analogdevicesinc/msdk