Maxim-Integrated /max32665 /GCR /EVENT_EN

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Interpret as EVENT_EN

Description

Event Enable Register.

Fields

CPU0DMAEVENT	Enable DMA event. When this bit is set, a DMA event will cause an RXEV event to wake the CPU from WFE sleep mode.
CPU0DMA1EVENT	Enable RXEV pin event. When this bit is set, a logic high of GPIO0[24] will cause an RXEV event to wake the CPU from WFE sleep mode.
CPU0TXEVENT	Enable TXEV pin event. When this bit is set, TXEV event from the CPU is output to GPIO[25].
CPU1DMAEVENT	Enable DMA event. When this bit is set, a DMA event will cause an RXEV event to wake the CPU from WFE sleep mode.
CPU1DMA1EVENT	Enable RXEV pin event. When this bit is set, a logic high of GPIO0[24] will cause an RXEV event to wake the CPU from WFE sleep mode.
CPU1TXEVENT	Enable TXEV pin event. When this bit is set, TXEV event from the CPU is output to GPIO[25].

Links

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