Maxim-Integrated /max32665 /I2C0 /MASTER_CTRL

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Interpret as MASTER_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (START)START 0 (RESTART)RESTART 0 (STOP)STOP 0 (7_bits_address)SL_EX_ADDR 0MCODE0 (en)SCL_SPEED_UP

SL_EX_ADDR=7_bits_address, SCL_SPEED_UP=en

Description

Master Control Register.

Fields

START

Setting this bit to 1 will start a master transfer.

RESTART

Setting this bit to 1 will generate a repeated START.

STOP

Setting this bit to 1 will generate a STOP condition.

SL_EX_ADDR

Slave Extend Address Select.

0 (7_bits_address): 7-bit address.

1 (10_bits_address): 10-bit address.

MCODE

Master Code. These bits set the Master Code used in Hs-mode operation.

SCL_SPEED_UP

Serial Clock speed Up. Setting this bit disables the master’s monitoring of SCL state for other external masters or slaves.

0 (en): Master monitors SCL state.

1 (dis): SCL state monitoring disabled.

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