Maxim-Integrated /max32665 /MCR /HIRC96M

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as HIRC96M

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0HIRC96MTR

Description

96MHz High Frequency Clock Adjustment Register

Fields

HIRC96MTR

HIRC96M Trim: Allow user to change 96M Frequency

256 (default): Default setting.

Links

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