Maxim-Integrated /max32665 /TPU /CIPHER_CTRL

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Interpret as CIPHER_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (encrypt)ENC 0 (complete)KEY 0 (cipherKey)SRC0 (dis)CIPHER 0 (ECB)MODE

MODE=ECB, CIPHER=dis, SRC=cipherKey, KEY=complete, ENC=encrypt

Description

Cipher Control Register.

Fields

ENC

Encrypt. Select encryption or decryption of input data.

0 (encrypt): Encrypt.

1 (decrypt): Decrypt.

KEY

Load Key from crypto DMA. This bit is automatically cleared by hardware after the DMA has completed loading the key. When the DMA operation is done, it sets the appropriate crypto DMA Done flag.

0 (complete): No operation/complete.

1 (start): Start operation.

SRC

Source of Random key.

0 (cipherKey): User cipher key (0x4000_1060).

2 (regFile): Key from battery-backed register file (0x4000_5000 to 0x4000_501F).

3 (qspiKey_regFile): Key from battery-backed register file (0x4000_5020 to 0x4000_502F).

CIPHER

Cipher Operation Select. Symmetric Block Cipher algorithm selection or memory operation.

0 (dis): Disabled.

1 (aes128): AES 128.

2 (aes192): AES 192.

3 (aes256): AES 256.

4 (des): DES.

5 (tdes): Triple DES.

MODE

Mode Select. Mode of operation for block cipher or memory operation. DES/TDES cannot be used in CFB, OFB or CTR modes.

0 (ECB): ECB Mode.

1 (CBC): CBC Mode.

2 (CFB): CFB (AES only).

3 (OFB): OFB (AES only).

4 (CTR): CTR (AES only).

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