Status Register.
| TX_BUSY | Read-only flag indicating the UART transmit status. |
| RX_BUSY | Read-only flag indicating the UARTreceiver status. |
| PARITY | 9th Received bit state. This bit identifies the state of the 9th bit of received data. Only available for UART_CTRL.SIZE[1:0]=3. |
| BREAK | Received BREAK status. BREAKS is cleared when UART_STAT register is read. Received data input is held in spacing (logic 0) state for longer than a full word transmission time (that is, the total time of Start bit + data bits + Parity + Stop bits). |
| RX_EMPTY | Read-only flag indicating the RX FIFO state. |
| RX_FULL | Read-only flag indicating the RX FIFO state. |
| TX_EMPTY | Read-only flag indicating the TX FIFO state. |
| TX_FULL | Read-only flag indicating the TX FIFO state. |
| RX_NUM | Indicates the number of bytes currently in the RX FIFO. |
| TX_FIFO_CNT | Indicates the number of bytes currently in the TX FIFO. |
| RX_TO | Receiver Timeout Status. Indicates if timeout has occurred. |