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Maxim-Integrated /max32670 /GCR /PM

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Interpret as PM

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (active)MODE0 (dis)GPIO_WE 0 (RTC_WE)RTC_WE 0 (LPTMR0_WE)LPTMR0_WE 0 (LPTMR1_WE)LPTMR1_WE 0 (LPUART0_WE)LPUART0_WE 0 (active)ERFO_PD 0 (IPO_PD)IPO_PD 0 (IBRO_PD)IBRO_PD 0 (ERFO_BP)ERFO_BP

GPIO_WE=dis, MODE=active, ERFO_PD=active

Description

Power Management.

Fields

MODE

Operating Mode. This two bit field selects the current operating mode for the device. Note that code execution only occurs during ACTIVE mode.

0 (active): Active Mode.

3 (shutdown): Shutdown Mode.

4 (backup): Backup Mode.
GPIO_WE

GPIO Wake Up Enable. This bit enables all GPIO pins as potential wakeup sources. Any GPIO configured for wakeup is capable of causing an exit from IDLE or STANDBY modes when this bit is set.

0 (dis): Wake Up Disable.

1 (en): Wake Up Enable.
RTC_WE

RTC Alarm Wake Up Enable. This bit enables RTC alarm as wakeup source. If enabled, the desired RTC alarm must be configured via the RTC control registers.
LPTMR0_WE

TIMER4 Wake Up Enable. This bit enables TIMER4 as wakeup source.
LPTMR1_WE

TIMER5 Wake Up Enable. This bit enables TIMER5 as wakeup source.
LPUART0_WE

LPUART3 Wake Up Enable. This bit enables LPUART3 as wakeup source.
ERFO_PD

32MHz power down. This bit selects 32MHz Crystal power state in DEEPSLEEP mode.

0 (active): Mode is Active.

1 (deepsleep): Powered down in DEEPSLEEP.
IPO_PD

96MHz power down. This bit selects 96MHz HIRC power state in DEEPSLEEP mode.
IBRO_PD

8MHz power down. This bit selects 8MHz HIRC power state in DEEPSLEEP mode.
ERFO_BP

32MHz Oscillator Bypass

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk