Maxim-Integrated /max32670 /MCR /LPPIOCTRL

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Interpret as LPPIOCTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (dis)LPTMR0_I 0 (dis)LPTMR0_O 0 (dis)LPTMR1_I 0 (dis)LPTMR1_O 0 (dis)LPUART0_RX 0 (dis)LPUART0_TX 0 (dis)LPUART0_CTS 0 (dis)LPUART0_RTS

LPUART0_RX=dis, LPUART0_CTS=dis, LPTMR0_O=dis, LPTMR0_I=dis, LPUART0_RTS=dis, LPTMR1_I=dis, LPUART0_TX=dis, LPTMR1_O=dis

Description

Low-power peripheral IO control.

Fields

LPTMR0_I

Setting this bit will enable the low-power timer 0 (timer 4) input pin while operating in low-power modes.

0 (dis): Disable LPTMR0 input pin.

1 (en): Enable LPTMR0 input pin.

LPTMR0_O

Setting this bit will enable the low-power timer 0 (timer 4) output pin while operating in low-power modes.

0 (dis): Disable LPTMR0 output pin.

1 (en): Enable LPTMR0 output pin.

LPTMR1_I

Setting this bit will enable the low-power timer 1 (timer 5) input pin while operating in low-power modes.

0 (dis): Disable LPTMR1 input pin.

1 (en): Enable LPTMR1 input pin.

LPTMR1_O

Setting this bit will enable the low-power timer 1 (timer 5) output pin while operating in low-power modes.

0 (dis): Disable LPTMR1 output pin.

1 (en): Enable LPTMR1 output pin.

LPUART0_RX

Setting this bit will enable the low-power UART 0 (UART3) RX pin while operating in low-power modes.

0 (dis): Disable LPUART0 RX pin.

1 (en): Enable LPUART0 RX pin.

LPUART0_TX

Setting this bit will enable the low-power UART 0 (UART3) TX pin while operating in low-power modes.

0 (dis): Disable LPUART0 TX pin.

1 (en): Enable LPUART0 TX pin.

LPUART0_CTS

Setting this bit will enable the low-power UART 0 (UART3) CTS pin while operating in low-power modes.

0 (dis): Disable LPUART0 CTS pin.

1 (en): Enable LPUART0 CTS pin.

LPUART0_RTS

Setting this bit will enable the low-power UART 0 (UART3) RTS pin while operating in low-power modes.

0 (dis): Disable LPUART0 RTS pin.

1 (en): Enable LPUART0 RTS pin.

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