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Maxim-Integrated /max32672 /ADC /INTEN

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Interpret as INTEN

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (READY)READY 0 (ABORT)ABORT 0 (START_DET)START_DET 0 (SEQ_STARTED)SEQ_STARTED 0 (SEQ_DONE)SEQ_DONE 0 (CONV_DONE)CONV_DONE 0 (CLIPPED)CLIPPED 0 (FIFO_LVL)FIFO_LVL 0 (FIFO_UFL)FIFO_UFL 0 (FIFO_OFL)FIFO_OFL

Description

Interrupt Enable Register.

Fields

READY

ADC is ready.
ABORT

Conversion start is aborted.
START_DET

Conversion start is detected.
SEQ_STARTED
SEQ_DONE
CONV_DONE
CLIPPED
FIFO_LVL
FIFO_UFL
FIFO_OFL

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk