PEND=idle, WR=complete, ERASE_CODE=nop
Flash Control Register.
| WR | Write. This bit is automatically cleared after the operation. 0 (complete): No operation/complete. 1 (start): Start operation. |
| ME | Mass Erase. This bit is automatically cleared after the operation. |
| PGE | Page Erase. This bit is automatically cleared after the operation. |
| ERASE_CODE | Erase Code. The ERASE_CODE must be set up property before erase operation can be initiated. These bits are automatically cleared after the operation is complete. 0 (nop): No operation. 85 (erasePage): Enable Page Erase. 170 (eraseAll): Enable Mass Erase. The debug port must be enabled. |
| PEND | Flash Pending. When Flash operation is in progress (busy), Flash reads and writes will fail. When PEND is set, write to all Flash registers, with exception of the Flash interrupt register, are ignored. 0 (idle): Idle. 1 (busy): Busy. |
| LVE | Low Voltage enable. |
| UNLOCK | Flash Unlock. The correct unlock code must be written to these four bits before any Flash write or erase operation is allowed. 2 (unlocked): Flash Unlocked. 3 (locked): Flash Locked. |