Maxim-Integrated /max32672 /MCR /PCLKDIS

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Interpret as PCLKDIS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (en)LPTMR0 0 (LPTMR1)LPTMR1 0 (LPUART0)LPUART0

LPTMR0=en

Description

Low Power Peripheral Clock Disable.

Fields

LPTMR0

Low Power Timer0 Clock Disable.

0 (en): enable it.

1 (dis): disable it.

LPTMR1

Low Power Timer1 Clock Disable.

LPUART0

Low Power UART0 Clock Disable.

Links

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