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Maxim-Integrated /max32672 /TRIMSIR /BB_SIR2

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Interpret as BB_SIR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TRIM_IBRO_RBIAS 0 (dis)RAM0_1ECCEN 0 (RAM2ECCEN)RAM2ECCEN 0 (RAM3ECCEN)RAM3ECCEN 0 (ICC0ECCEN)ICC0ECCEN 0 (FL0ECCEN)FL0ECCEN 0 (FL1ECCEN)FL1ECCEN 0TRIM_IBRO

RAM0_1ECCEN=dis

Description

System Init. Configuration Register 2.

Fields

TRIM_IBRO_RBIAS

HIRC8M Trim
RAM0_1ECCEN

RAM 0 and RAM 1 ECC Enable

0 (dis): ECC Disabled.

1 (en): ECC Enabled.
RAM2ECCEN

RAM 2 ECC Enable
RAM3ECCEN

RAM 3 ECC Enable
ICC0ECCEN

ICC 0 ECC Enable
FL0ECCEN

Flash 0 ECC Enable
FL1ECCEN

Flash 1 ECC Enable
TRIM_IBRO

HIRC8M Trim

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk