lpuart0=en, lptmr1=en, lptmr0=en
Peripheral clock control register.
lptmr0 | Clearing this bit will enable the low-power timer 0 (timer 4) peripheral clock. 0 (en): Enable LPTMR0 clock. 1 (dis): Disable LPTMR0 clock. |
lptmr1 | Clearing this bit will enable the low-power timer 1 (timer 5) peripheral clock. 0 (en): Enable LPTMR1 clock. 1 (dis): Disable LPTMR1 clock. |
lpuart0 | Clearing this bit will enable the low-power UART 0 (UART3) peripheral clock. 0 (en): Enable LPUART0 clock. 1 (dis): Disable LPUART0 clock. |