RX Controller Interrupt Enable Register.
| EECC2 | CSI RX ECC 2-bit Error interrupt enable. |
| EECC1 | CSI RX ECC 1-bit Error interrupt enable. |
| ECRC | CSI RX CRC Error interrupt enable. |
| EID | CSI RX Packet Header Data ID Error interrupt enable |
| PKTFFOV | CSI RX Packet FIFO Overrun interrupt enable |
| DL0ULPSA | CSI Data Lane0 ULPSS Active interrupt enable |
| DL1ULPSA | CSI Data Lane1 ULPSS Active interrupt enable |
| DL0ULPSM | CSI Data Lane0 ULPSS Mark interrupt enable |
| DL1ULPSM | CSI Data Lane1 ULPSS Mark interrupt enable |
| CL0ULPSA | CSI Clock Lane0 ULPSS Active interrupt enable |
| CL0ULPSM | CSI Data Lane0 ULPSS Mark interrupt enable |