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Maxim-Integrated /max78002 /CSI2 /ULPS_CLK_MARK_STATUS

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Interpret as ULPS_CLK_MARK_STATUS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLK_LANE)CLK_LANE

Description

ULPS_CLK_MARK_STATUS.

Fields

CLK_LANE

Clock Lane.

Links

()

Register Reference

https://github.com/analogdevicesinc/msdk