RAMRET1=dis, BGOFF=on, RAMRET7=dis, RAMRET2=dis, RAMRET5=dis, RAMRET3=dis, RAMRET6=dis, RAMRET4=dis, RAMRET0=dis
Low Power Control Register.
| RAMRET0 | System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit. 0 (dis): Disable Ram Retention. 1 (en): Enable System RAM 0 retention. |
| RAMRET1 | System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit. 0 (dis): Disable Ram Retention. 1 (en): Enable System RAM 1 retention. |
| RAMRET2 | System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit. 0 (dis): Disable Ram Retention. 1 (en): Enable System RAM 2 retention. |
| RAMRET3 | System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit. 0 (dis): Disable Ram Retention. 1 (en): Enable System RAM 3 retention. |
| RAMRET4 | System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit. 0 (dis): Disable Ram Retention. 1 (en): Enable System RAM 3 retention. |
| RAMRET5 | System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit. 0 (dis): Disable Ram Retention. 1 (en): Enable System RAM 3 retention. |
| RAMRET6 | System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit. 0 (dis): Disable Ram Retention. 1 (en): Enable System RAM 3 retention. |
| RAMRET7 | System RAM retention in BACKUP mode. These two bits are used in conjuction with RREGEN bit. 0 (dis): Disable Ram Retention. 1 (en): Enable System RAM 3 retention. |
| ISOCLK_SELECT | 0 = PCLK 1= ISO CLK use for RISV in Low power mode |
| FAST_ENTRY_DIS | Fast Low Power mode entry disable |
| BGOFF | Bandgap OFF. This controls the System Bandgap in DeepSleep mode. 0 (on): Bandgap is always ON. 1 (off): Bandgap is OFF in DeepSleep mode (default). |
| WKRST | Reset wakeup status registers |